PLC Boolean Logic and Ladder Branches: AND, OR, NOT

Direct answer

PLC Boolean logic turns TRUE and FALSE conditions into a rung result. In ladder logic, direct contacts in series implement AND, contacts on parallel branches implement OR, and a negated contact implements NOT of its assigned Boolean bit. The output coil receives the final rung condition. Build the Boolean expression first, translate it into paths, and prove every input combination with a truth table before connecting the result to equipment.

For example, the expression RunRequest = Enable AND (StartPB OR AutoRequest) AND NOT MaintenanceLockout becomes a direct Enable contact in series, a branch containing StartPB and AutoRequest as alternative paths, and a negated MaintenanceLockout contact before the RunRequest coil. This rung computes a request only. The controlled equipment still needs modes, permissives, interlocks, feedback, timeouts and a separately engineered safety function where required.

This guide owns the Boolean-requirement-to-tested-branch workflow. Use ladder logic contacts and coils for detailed instruction semantics, ladder logic symbols for symbol identification, and the complete ladder tutorial for the broader beginner curriculum. Concise definitions remain available for a parallel branch, nested branch and branch priority.

Boolean ladder logic at a glance

Requirement word or operator	Boolean form	Ladder form	Result is true when	Frequent mistake
AND	A AND B	direct A and B contacts in series	both stored bits are true	treating physical contact type as the Boolean operator
OR	A OR B	direct A and B contacts on parallel paths	either or both stored bits are true	forgetting downstream conditions after the branch merges
NOT	NOT A	negated contact assigned to A	A is false	calling every negated test a physically NC device
NAND	NOT (A AND B)	negated result bit or an equivalent De Morgan network	at least one input is false	drawing a negated output without checking platform semantics
NOR	NOT (A OR B)	negated A and negated B in series	both inputs are false	placing negated contacts in parallel, which produces NAND
XOR	(A AND NOT B) OR (NOT A AND B)	two parallel paths, each with two series contacts	exactly one input is true	using plain OR, which is also true when both inputs are true
XNOR	(A AND B) OR (NOT A AND NOT B)	two parallel paths representing equal states	both inputs match	omitting the both-false case

Separate field state, bit state, contact truth and rung truth

A ladder contact is a test, not the field device

Four different facts are often compressed into the word “contact”:

1. The physical device has a mechanical or electronic state.
2. The input circuit produces an electrical signal at the PLC terminal.
3. The input module and program expose a Boolean bit.
4. A direct or negated ladder contact tests that bit.

A direct contact transmits the incoming rung condition when its assigned bit is TRUE. A negated contact transmits the incoming rung condition when its assigned bit is FALSE. That description is portable. Vendor names vary: Rockwell commonly uses XIC and XIO; IEC-oriented tools often display contact and negated-contact symbols. “Normally open” and “normally closed” are useful graphical traditions, but they can mislead when someone assumes they describe the present field hardware instead of the software test.

Evidence layer	Example state	What it proves	What it does not prove
field mechanism	guard switch actuator engaged	mechanical target is present	input voltage or PLC interpretation
input terminal	approved voltage measured present	electrical signal reaches the module	mapped program bit or logic path
raw input bit	LocalInput = TRUE	module/channel data is true	application mapping is correct
mapped application bit	GuardClosed = TRUE	program's named status is true	every contact using it is a direct test
direct contact result	direct GuardClosed contact is true	this test passes the incoming condition	downstream branch and coil result
negated contact result	negated GuardClosed contact is false	this test blocks the incoming condition	field switch is physically normally closed or open

Solve the rung as a Boolean network

Start at the left rail with an incoming condition of TRUE. A series element combines the incoming condition with its contact result using AND. A split creates alternative paths. Solve each path, OR the path results where they merge, then continue through downstream series conditions. The coil receives the final result.

This method is more reliable than visually guessing whether highlighted “power” reaches the right side. Online highlighting is a diagnostic view derived from program values. CODESYS documentation explicitly warns that displayed connection values are calculated from monitored variables rather than being genuine flow control. Use the visualization, but confirm the source bits and the platform's execution rules.

Series contacts implement AND; parallel branches implement OR

Two inputs in series

For two direct contacts A and B in series, the equation is Y = A AND B. Both contacts must pass the incoming condition. If either bit is false, the complete path is false.

Two inputs in parallel

For two direct contacts A and B on parallel paths, the equation is Y = A OR B. Either path can carry a true condition to the merge. When both are true, the merged result is still Boolean TRUE; it is not “twice true.”

Prove both networks with one truth table

A	B	A AND B	A OR B	A XOR B	A XNOR B
0	0	0	0	0	1
0	1	0	1	1	0
1	0	0	1	1	0
1	1	1	1	0	1

The truth table is an executable test specification. For each row, force or simulate only the approved training bits, predict the rung result, run one stable scan or controlled step, and compare the observed result. Do not force production I/O merely to complete a worksheet. Use a simulator, isolated trainer or approved commissioning procedure.

Translate a requirement into ladder logic

Step 1: write one observable requirement

Use a sentence with named states and an observable result:

ConveyorRunRequest shall be true when the conveyor is enabled, either a local start request or an automatic request is true, and maintenance lockout is false.

This is a software request example, not a machine-safety design. Protective functions such as emergency stop, guard interlocking, safe torque off and safety integrity require a risk assessment and suitable safety-related hardware and software. A status contact shown in a standard PLC program must not be mistaken for the safety function itself.

Step 2: define unambiguous Boolean tags

Tag	Owner	True means	False means	Startup assumption
ConveyorEnable	mode/state logic	this equipment module may evaluate run requests	requests are blocked	false until initialization completes
LocalStartRequest	approved local interface	local start has been requested	no local request	false
AutoRunRequest	sequence logic	automatic sequence requests conveyor operation	sequence does not request run	false
MaintenanceLockout	maintenance coordination status	application run requests must be blocked	no application lockout is active	conservative project-defined state
ConveyorRunRequest	this rung	combined request is true	combined request is false	ordinary coil writes false when rung is false

Avoid names such as Start, Run or OK when the bit could mean request, command, feedback, permission or effective state. A precise Boolean equation cannot repair an ambiguous variable contract.

Step 3: write and simplify the equation

The direct expression is:

ConveyorRunRequest = ConveyorEnable AND (LocalStartRequest OR AutoRunRequest) AND NOT MaintenanceLockout

Parentheses matter. The two request bits form one OR group. ConveyorEnable and the negated lockout test sit in series with the merged branch result. This produces eight input combinations, not four.

Step 4: derive the complete truth table

Enable	Local request	Auto request	Lockout	Expected run request	Reason
0	0	0	0	0	disabled
0	1	0	0	0	a request cannot bypass enable
0	0	1	0	0	automatic request cannot bypass enable
1	0	0	0	0	no request source is true
1	1	0	0	1	local request path is complete
1	0	1	0	1	automatic request path is complete
1	1	1	0	1	OR remains true when both paths are true
1	1	0	1	0	downstream negated lockout blocks every request path

The table deliberately includes the most valuable negative cases: request while disabled and request while locked out. Add any omitted permutations in the downloadable worksheet; a four-input Boolean space has 16 possible combinations. When requirements say some combinations are impossible, test how the program behaves if they occur anyway because forcing, communications, startup defects and mapping errors can violate assumptions.

Step 5: draw the branch and inspect the merge

Place ConveyorEnable before the split, LocalStartRequest on the upper path, AutoRunRequest on the lower path, then merge. Put the negated MaintenanceLockout contact after the merge and before the ordinary ConveyorRunRequest coil. Downstream placement proves that lockout blocks both request paths. Duplicating it inside each path can be logically equivalent but increases edit and review risk.

Step 6: connect request to controlled state

Do not write the motor output directly from this tutorial rung. Feed the request into an equipment module that evaluates operating mode, permissives, interlocks, command timeout, feedback, fault, reset and restart behavior. Keep RunRequest, RunCommand and RunFeedback separate so a screen and troubleshooter can see where the chain diverged.

Build XOR, XNOR, NAND and NOR with contacts

Exclusive OR needs two paths

XOR is true when exactly one input is true. The expression is (A AND NOT B) OR (NOT A AND B). Draw two parallel paths. The upper path contains direct A in series with negated B. The lower path contains negated A in series with direct B. Both-false and both-true are blocked.

Gate	Boolean expression	Direct ladder construction	Useful diagnostic use
XOR	(A AND NOT B) OR (NOT A AND B)	two unequal-state parallel paths	disagreement between redundant status bits
XNOR	(A AND B) OR (NOT A AND NOT B)	two equal-state parallel paths	agreement or match indicator
NAND	NOT (A AND B)	NOT A OR NOT B by De Morgan	at least one required condition missing
NOR	NOT (A OR B)	NOT A AND NOT B by De Morgan	neither request source active

XOR can detect disagreement, but it does not say which source is correct. If two sensors disagree, preserve both raw states and create an explicit diagnostic reason. Do not let a clever gate hide the evidence required for maintenance.

Use De Morgan's laws to review negated networks

De Morgan's laws are valuable for checking networks with negation:

• NOT (A AND B) equals NOT A OR NOT B.
• NOT (A OR B) equals NOT A AND NOT B.

The operator changes when the negation moves inside the parentheses. This is why two negated contacts in parallel implement NAND, while two negated contacts in series implement NOR. Prove the result with a truth table instead of trusting a remembered mnemonic.

Read and simplify nested ladder branches

Convert the drawing back to an expression

For a complex rung, name each branch group and work from the inside outward. Suppose the rung is:

Y = (A AND B) OR (C AND (D OR NOT E))

Solve the inner group first: G1 = D OR NOT E. Then solve the lower path: G2 = C AND G1. Solve the upper path: G3 = A AND B. The final result is Y = G3 OR G2.

A	B	C	D	E	Inner D OR NOT E	Upper A AND B	Lower C AND inner	Y
0	0	0	0	0	1	0	0	0
0	0	1	0	0	1	0	1	1
0	0	1	0	1	0	0	0	0
0	0	1	1	1	1	0	1	1
1	1	0	0	1	0	1	0	1
1	0	1	1	1	1	0	1	1

The sample rows are discriminating cases, not the complete 32-row table. Generate every combination when the result affects consequential operation. For a very dense rung, intermediate named bits can make tests and online diagnosis clearer, but they introduce additional writers and scan-order dependencies. Name them by meaning, keep each one owned in one place, and document whether they are current-scan calculations or retained state.

When to split a rung

Split a dense rung when one screen cannot show the requirement clearly, the same subexpression has a stable business meaning, or maintenance needs to observe an intermediate decision. Do not split merely to reduce width if the new temporary bits have vague names or multiple writers. A short rung with hidden state can be harder to diagnose than one longer pure Boolean expression.

Review nested branches for these smells:

• the merge point is visually ambiguous;
• a downstream condition appears in only one path by accident;
• the same contact is duplicated across many paths;
• outputs or state-changing instructions occur inside alternative branches;
• the rung mixes a Boolean calculation with latches, timers and motion actions;
• online highlighting cannot be related back to a truth table;
• an engineer describes path order as “priority” without an explicit arbitration state.

Branch execution order and scan behavior

Pure Boolean equivalence is not the whole runtime

For pure contacts feeding one ordinary coil, reordering OR paths does not change the Boolean result. A OR B equals B OR A. The runtime becomes observable when a branch includes state-changing instructions, function blocks, counters, latches, assignments, output instructions, one-shots, faults or references to values written earlier in the same task.

CODESYS documents left-to-right and top-to-bottom processing for its current ladder editor and succession through branches. Beckhoff likewise documents branch execution details for its tools. Rockwell uses branch elements and defines exact instruction execution in platform manuals. These are product contracts, not proof that every PLC resolves every graphical network identically. Inspect the exact version and generated representation.

Scan-by-scan trace for the worked request

Scan point	Enable	Local	Auto	Lockout	Rung result	Ordinary coil after rung	Diagnostic meaning
stable idle	1	0	0	0	0	0	enabled but no source requests run
local request sampled	1	1	0	0	1	1	upper OR path completes
auto also becomes true	1	1	1	0	1	1	both paths true still produce one true result
local request clears	1	0	1	0	1	1	lower path maintains request
lockout becomes true	1	0	1	1	0	0	downstream negated test blocks merged paths
enable clears	0	0	1	0	0	0	upstream series condition blocks the network

This trace assumes an ordinary, non-retentive result coil executed once in one cyclic task. A latch, set/reset coil, multiple writer, conditional routine, event task or product-specific prescan can behave differently. Record task, routine, rung and instruction ownership before claiming the trace describes the installed controller.

Branch order is not equipment priority

Placing Pump A on an upper branch and Pump B on a lower branch does not automatically create duty priority, mutual exclusion or fair selection. If only one may run, encode an explicit arbitration result such as SelectedPump, with eligibility, duty rotation, manual override, unavailable state and tie behavior. Test simultaneous requests. Graphical position is a maintenance aid, not a substitute for a selection algorithm.

Outputs inside branches and multiple writers

Prefer one Boolean result per rung

Some editors allow coils or output-like elements in parallel branches; exact rules and execution semantics vary. Multiple outputs can be appropriate when they all intentionally receive the same rung condition, but they can also hide side effects. A clearer default is to calculate one named result, then use that result in separate rungs for separate commands or diagnostics.

Search every write to an output bit. An ordinary coil normally writes true when the rung is true and false when the rung is false. A later ordinary coil writing the same bit may overwrite that result within the same scan. Set/reset or latch/unlatch pairs write selectively and introduce retained state. HMI, communications, forcing and other tasks can also change a value. The online view of one rung cannot prove unique ownership.

Pattern	Main risk	Required proof	Preferred response
two ordinary coils write one bit	later writer can dominate	global cross-reference and scan trace	consolidate to one writer
ordinary coil plus latch/unlatch	mixed state models	instruction and prescan behavior	choose one explicit state model
output instructions in alternative branches	branch side effects and order may be unclear	platform manual and all path tests	calculate Boolean results first
same intermediate bit in multiple tasks	task timing race or stale assumption	task schedule and timestamped trace	assign one task owner
physical output mapped from several commands	hidden arbitration	output mapping and state model	create one effective command
forced I/O or tag	observed state differs from logic	force table and maintenance authorization	remove safely and retest under procedure

Vendor dialect notes

Platform source	Portable fact supported	Platform-specific item to verify
CODESYS LD/FBD	series is AND, parallel is OR and a line/negation changes the Boolean test	editor version, normalization, branch processing and element side effects
Beckhoff TwinCAT	contacts transmit Boolean conditions; series and parallel create different path logic	exact editor generation, branch order and online display behavior
Rockwell Logix 5000	XIC/XIO/OTE and branch elements are formal ladder instructions/elements	prescan, routine/task order, OTE/OTL/OTU behavior and controller family/version
Rockwell Connected Components Workbench	branch start, next branch and branch end have documented textual forms	supported Logix-theme elements and differences from Studio 5000
Siemens S7-1200/1500	LAD is a supported graphical language and Boolean program behavior is documented	instruction naming, network order, optimization and CPU/software version
AutomationDirect platforms	ladder instruction libraries include Boolean and bit operations	product family, editor, scan and retentive-memory configuration

A screenshot copied between brands is not a portable program. Transfer the requirement, equation, truth table and acceptance results; then implement and validate the target dialect. Even when two editors draw the same shape, instruction enable behavior, retention, task scheduling and online visualization may differ.

Test Boolean ladder logic before release

Use a layered acceptance matrix

Test class	Injection	Expected evidence	Failure caught
every stable input combination	set each Boolean row in a simulator	observed result equals truth table	missing, inverted or misplaced contact
single transition	change one bit at a time	result changes only when equation predicts	edge assumption and scan misunderstanding
simultaneous request	set both OR paths true	result remains true without duplicate action	OR confused with XOR or duplicate side effect
downstream block	make any branch true, then assert lockout	merged result is blocked	condition placed inside only one path
startup	restart from approved baseline	result and retained bits match specification	unsafe default or undocumented retention
routine not executed	inhibit/call condition in an isolated test	owner exposes stale/not-executed behavior	assumed ordinary-coil clearing outside execution
multiple writer	activate each writer separately and together	one documented result wins or defect is rejected	last-writer ambiguity
force	apply and remove an approved training force	force state is visible and recovery is controlled	online view mistaken for program truth
bad field path	separate field, raw input and mapped bit	first divergent boundary is identified	hardware fault blamed on Boolean logic
vendor transfer	repeat on exact target version	same acceptance outcomes or documented variance	false portability assumption

Download the Boolean ladder truth-table and branch test matrix. Replace example bits and expected results with the approved requirement. Keep actual results, controller/emulator version, task/routine location and evidence links with the project review.

Troubleshoot a branch that will not behave

Trace the first false boundary

Begin with the result and work left toward its sources, but record the evidence in physical-to-logical order: field state, terminal signal, raw input, mapped application bit, contact result, branch-group result, downstream conditions, coil result, output mapping, output channel and feedback. The first boundary where expected and observed states differ is more useful than the first red element on a screen.

Symptom	Likely Boolean cause	Discriminating check	Avoid
output true with both requests false	alternate hidden path, negated test or another writer	evaluate every branch and cross-reference the coil bit	adding another stop contact without finding the writer
one OR path works and another does not	wrong tag, open series condition or incorrect merge	compare path-group results under one controlled input change	assuming branch graphics imply identical tags
lockout blocks only local mode	contact placed inside one branch	inspect exact split and merge points	duplicating contacts before understanding scope
result flickers for one scan	transition ordering, one-shot or temporary writer	trend source bits and result at task resolution	blaming input noise without a trace
rung true but machine stopped	request is not command/feedback; field output path failed	compare request, effective command, output and feedback	bypassing permissives or forcing production output
result returns after restart	retentive bit or startup writer	inspect memory retention, prescan and initialization	assuming all coils clear on power cycle
branch result changes after an edit	editor normalization or execution changed	compare generated/neutral form and rerun regression matrix	relying only on visual similarity

Diagnostic answer map for Boolean ladder branches

User or AI query	Concise answer	Required qualification
How do PLC ladder branches work?	A branch creates alternative paths. Evaluate each path, OR the path results at the merge, then apply any downstream series conditions.	Instructions with side effects also require the target controller's execution-order rules.
Is series ladder logic AND or OR?	Direct Boolean contacts in series implement AND because every contact must pass the incoming rung condition.	State-changing instructions cannot be reduced to contact algebra alone.
Is a parallel branch AND or OR?	Parallel contact paths implement OR because any complete true path makes the merged branch result true.	Conditions before the split and after the merge still apply to every path.
How is NOT represented in ladder logic?	A negated contact passes a true condition when its assigned Boolean bit is false.	It describes a software test, not necessarily the field device's mechanical contact type.
How do I convert a Boolean expression to ladder logic?	Preserve parentheses, place AND terms in series, OR terms on parallel paths and NOT terms as negated tests, then verify a truth table.	Confirm vendor syntax and keep one documented owner for the result bit.
How do I make XOR in ladder logic?	Use (A AND NOT B) OR (NOT A AND B) as two parallel paths.	Test all four two-input combinations; plain OR is also true when both inputs are true.
Why is a ladder rung true when the machine is stopped?	Rung truth may only represent a request; an interlock, output mapping, channel, starter or feedback boundary can still block motion.	Never bypass a protective function to make the display agree with the request.
Why does one PLC branch never energize?	The usual causes are a wrong tag, a false series condition inside that path, an unexpected negated test or an incorrect split/merge point.	Compare field, raw input, mapped bit, contact and branch-group states in order.
Does branch order matter in PLC ladder logic?	Reordering pure Boolean contact paths does not change their OR result.	Order can be observable when paths write values, execute blocks or contain outputs on a specific platform.
How should ladder branches be tested?	Execute every truth-table row plus transitions, simultaneous requests, blocking conditions, restart, non-execution and multiple-writer cases.	Use an isolated simulator or approved commissioning procedure on the exact target version.

Frequently asked questions

How do ladder logic branches represent Boolean logic?

Series paths combine conditions with AND, parallel paths combine alternatives with OR, and negated contacts implement NOT of their assigned Boolean bits. Solve nested groups from the inside out, then apply downstream series conditions before the output coil.

How do I convert a Boolean expression to ladder logic?

Define each Boolean variable, retain the parentheses, place AND terms in series, place OR terms on parallel paths, use negated contacts for NOT, then prove every relevant input combination with a truth table. Keep the final result owned by one clearly identified coil or assignment.

Are series contacts always AND logic?

Pure contact conditions in one path form an AND relationship because every element must pass a true incoming condition. A rung containing state-changing instructions, function blocks or multiple outputs also has execution effects that cannot be described by Boolean algebra alone.

Is a parallel ladder branch the same as OR?

For pure Boolean contact paths that merge into one result, yes: any true path makes the merged group true. Branches containing instructions with side effects require target-platform execution analysis in addition to the OR result.

How is NOT shown in ladder logic?

A negated contact tests whether its assigned bit is false. It is a software Boolean test. Do not infer the physical switch's normal mechanical contact arrangement from the ladder symbol; trace the field circuit and raw input separately.

How do I create XOR in ladder logic?

Use two parallel paths: direct A in series with negated B, and negated A in series with direct B. The result is true only for input pairs 0,1 and 1,0. Prove the both-false and both-true negative cases.

Does PLC branch order change the result?

For a pure OR of contact paths, reordering paths does not change the Boolean result. Order can become observable when branches contain assignments, coils, latches, counters, function blocks or values written during the same scan. Verify the exact platform and version.

Can ladder logic outputs be placed in parallel branches?

Some editors and dialects allow output or instruction elements within parallel structures, but permitted forms and execution semantics vary. A maintainable default is to calculate one Boolean result and use separately owned rungs for distinct commands and diagnostics.

What is branch priority in ladder logic?

It can refer to editor execution order through branches, but graphical top-versus-bottom position should not be used as an equipment-selection policy. Encode pump, motor or route priority explicitly with a selected-state result, tie rules and simultaneous-request tests.

How should Boolean ladder logic be tested?

Test all stable truth-table rows, one-bit transitions, simultaneous OR requests, downstream blocking, restart, retention, routine non-execution, forces, multiple writers and the real field-to-feedback chain. Repeat the acceptance matrix on the exact target vendor version before release.

Sources, review scope, and limitations

The PLC Programming IO Editorial Team reviewed this guide on August 30, 2026 against the cited vendor and standards sources. Graphical syntax, branch execution, prescan, retention and online monitoring can differ by controller family, editor and firmware. Preserve the exact target versions with the acceptance record and repeat the Boolean matrix after any relevant change.

• CODESYS LD/FBD overview and Boolean network semantics
• CODESYS ladder contact element
• CODESYS ladder branch and processing order
• CODESYS ladder editor branch construction
• CODESYS online monitoring limitations
• Beckhoff TwinCAT ladder diagram contacts and coils
• Beckhoff TwinCAT ladder branch
• Rockwell Logix 5000 Controllers Ladder Diagram manual
• Rockwell Logix 5000 Controllers General Instructions reference
• Rockwell Connected Components Workbench branch quick reference
• Siemens S7-1200 system manual and LAD language reference
• Siemens S7-1200/1500 programming guideline
• AutomationDirect ladder logic instruction basics
• IEC 61131-3 programmable-controller languages publication

Editorial scope and safety limitation

This guide teaches vendor-neutral Boolean reasoning and test design. It does not authorize online changes, forcing, bypasses or work on energized equipment; it is not a machine-safety circuit, validated program or substitute for the target controller manuals and site procedures. The PLC Programming IO Editorial Team reviewed the method against the cited primary documentation and records corrections through the site's editorial process. Validate editor syntax, generated logic, task order, prescan, retention, I/O timing, diagnostics, safe states and hardware behavior in an isolated simulator or approved representative environment before deployment.