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OTL Output Latch: Rockwell PLC Behavior & Examples

OTL - OTL (Output Latch)

Quick answer

Rockwell OTL (Output Latch) sets a BOOL to TRUE when its rung is true. When the rung later becomes false, OTL makes no change, so the bit remains TRUE until an OTU, another write or initialization clears it.

Key Takeaways

  • Rockwell OTL (Output Latch) sets a BOOL to TRUE when its rung is true. When the rung later becomes false, OTL makes no c...
  • Beginner-level topic in Ladder Logic Elements
  • Commonly used in: Stored sequence and mode requests, Non-safety alarm memory

Detailed Definition

OTL is a state-setting output instruction in Allen-Bradley and Rockwell ladder logic. It differs from OTE: OTE writes both the true and false rung result, while OTL only writes TRUE when enabled. OTU is the paired instruction that writes FALSE.

“Retentive” here describes how the bit behaves when the OTL rung goes false; it is not a complete promise about power loss, downloads, controller mode changes or nonvolatile storage. Use OTL/OTU for an internal request or sequence state with explicit ownership. Mapping a latched bit directly to a physical actuator can create an uncontrolled restart path.

Evidence and scope

OTL and OTU behavior was checked against Rockwell Logix Designer V38 documentation. Other platforms have SET/RESET or RS/SR instructions with similar intent but not guaranteed identical startup, priority or storage behavior.

Technical review:

Packaging machine state model showing explicit idle, running, held and fault transitions
Editorial illustration: explicit state transitions are easier to review than scattered latch and unlatch instructions
Motor control state table comparing request, permissive, fault and output states
Editorial illustration: the final motor command should remain a continuously evaluated result, even when its request is stored

Critical behavior

  • OTL writes TRUE only when its rung is true; a false OTL rung does not clear the bit.
  • OTU writes FALSE only when its rung is true. The final value depends on every write that executes.
  • Rockwell warns that overwritten output tags or shared structure members can cause unexpected operation.
  • OTL does not have a prescan action in current Logix documentation; project initialization and produced/consumed or I/O behavior still need separate checks.
  • A latched internal request should be separated from the final actuator command and its permissives.

Verification checklist

  1. 1Cross-reference the target BOOL and eliminate unintended multiple writers.
  2. 2Test OTL only, OTU only, both conditions and neither condition.
  3. 3Move the controller through relevant operating modes and power states.
  4. 4Verify that permissives gate the final command continuously.
  5. 5Confirm that the tag is not being used as a substitute for certified safety logic.

IEC and vendor terminology

Similar-looking instructions do not always have identical execution, initialization or storage behavior.

PlatformCommon termWhat to verify
Rockwell Studio 5000OTL / OTUOTL sets the BOOL when enabled; OTU clears it when enabled. False rungs make no change to the target bit.
Rockwell standard outputOTEWrites the current rung result and therefore clears its bit when the rung is false. It is not an OTL substitute.
Siemens STEP 7S / R coil; RS / SRSimilar stored-state intent, but simultaneous-input priority and restart semantics must be selected and tested explicitly.
CODESYS / IEC styleRS / SRBistable function blocks expose defined reset- or set-dominance rather than relying on two separate writes.

OTL/OTU ownership pattern

One tag owns the stored request; a separate OTE calculates the continuously validated run command.

OTL and OTU scan-order table

Assume both instructions address Cycle_Active. When both execute true in one task scan, the later write determines the final value.

State / phaseOTL rungOTU rungFinal BOOL
Neither executesFALSEFALSEPrevious value
Latch onlyTRUEFALSETRUE
Unlatch onlyFALSETRUEFALSE
OTL then OTUTRUE firstTRUE laterFALSE
OTU then OTLTRUE laterTRUE firstTRUE
Program order is part of the behavior. Prefer an explicit reset-dominant state equation when simultaneous conditions are possible.

Working LD and ST example

Translate an OTL/OTU pair into explicit reset-dominant ST

Make priority visible and keep the stored request separate from the continuously evaluated output.

Ladder Diagram

|----[ Start_Pulse ]--------------------(OTL) Cycle_Request----|
|----[ Stop_Pulse ]---------------------(OTU) Cycle_Request----|
|----[ Cycle_Request ]----[ Healthy ]----(OTE) Conveyor_Run----|

Structured Text

IF StopPulse OR NOT Healthy THEN
    CycleRequest := FALSE;
ELSIF StartPulse THEN
    CycleRequest := TRUE;
END_IF;

ConveyorRun := CycleRequest AND Healthy;

Expected result: Stop or unhealthy state wins over Start. ConveyorRun drops immediately with Healthy even if another code path has not yet cleared CycleRequest.

Failure modes and diagnostic checks

SymptomLikely causeCheck next
A latched bit changes with no visible OTL or OTU rung trueThe tag is written by an alias, HMI, produced/consumed value, initialization routine or another instruction.Use the controller cross-reference and trend every write source, not only OTL/OTU instructions.
The output restarts after a mode transitionA stored request remained true and the final command lacks a restart inhibit or first-scan policy.Test Program-to-Run, power-cycle and communications recovery with the real I/O path.
Stop and Start together produce inconsistent resultsTwo separate writes make priority depend on routine and task execution order.Encode a single reset-dominant state equation or document and verify the intended order.
OTU clears an internal tag but not the machineThe physical output is driven by a different tag, force, safety controller or external holding circuit.Trace the command through output mapping, module data, safety path and field feedback.

Current primary and technical sources

These sources support the behavior summarized on this page. The project's controller, firmware and IDE help remain authoritative for implementation.

Continue with the practical guide

Common Questions

What is OTL (Output Latch)?

Rockwell OTL (Output Latch) sets a BOOL to TRUE when its rung is true. When the rung later becomes false, OTL makes no change, so the bit remains TRUE until an OTU, another write or initialization clears it.

When should I use OTL (Output Latch)?

OTL (Output Latch) is particularly useful in scenarios such as Stored sequence and mode requests and Non-safety alarm memory. Consider implementing it when you need reliable, efficient solutions for these types of applications.

What should I verify before using OTL (Output Latch)?

Cross-reference the target BOOL and eliminate unintended multiple writers. Test OTL only, OTU only, both conditions and neither condition. Move the controller through relevant operating modes and power states. Verify that permissives gate the final command continuously. Confirm that the tag is not being used as a substitute for certified safety logic.

What are related concepts I should learn?

To fully understand OTL (Output Latch), you should also familiarize yourself with TON (Timer On-Delay), TOF (Timer Off-Delay), and CTU (Count Up). These concepts work together in industrial automation systems.

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Important

About Ladder Logic Elements

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